DESRES/TRDesmond Performance on a Cluster of Multicore Processors Edmond Chow, 1 Charles A. Rendleman,1 Kevin J. Bowers,1 Ron O. Dror,1 Douglas H. Hughes,1 Justin Gullingsrud,1 Federico D. Sacerdoti,1 and Davi

Source URL: www.deshawresearch.com

• Computing
• Chemistry
• Parallel computing
• Theoretical chemistry
• Computational chemistry
• Molecular dynamics
• Molecular modelling
• Scientific modeling
• Benchmark
• Multi-core processor
• Desmond

Energy Proportionality and Workload Consolidation for Latency-critical Applications George Prekas1 , Mia Primorac1 , Adam Belay2 , Christos Kozyrakis2 , Edouard Bugnion1 1 EPFL Abstract

Source URL: www.scs.stanford.edu

• Parallel computing
• Computer performance
• Energy proportional computing
• Network performance
• Scheduling
• Throughput
• Speedup
• Latency
• Multi-core processor
• Hyper-threading
• Forwarding plane
• Packet processing

Inspector/Executor Load Balancing Algorithms for Block-Sparse Tensor Contractions 1 Ozog , 2 Hammond ,

Source URL: nic.uoregon.edu

• Computing
• Parallel computing
• NWChem
• Load balancing
• Multi-core processor
• Partition
• Computer cluster

Anatomy of High-Performance Many-Threaded Matrix Multiplication Tyler M. Smith∗ , Robert van de Geijn∗ , Mikhail Smelyanskiy† , Jeff R. Hammond‡ and Field G. Van Zee∗ ∗ Institute for Computational Engineerin

Source URL: www.cs.utexas.edu

• Computer architecture
• Parallel computing
• Compiler optimizations
• Cache
• Computer memory
• CPU cache
• Xeon Phi
• Multi-core processor
• Xeon
• Loop nest optimization
• Nehalem
• PowerPC A2

04 ACP” Fanless Multi-Touch Computer With Intel® Core™ i7/i5/P4500 Processor, 2 GB RAM Infotainment Multi-Touch Panel Solutions

Source URL: tritech.se

Scheduling of Mixed-Criticality Applications on Resource-Sharing Multicore Systems Georgia Giannopoulou, Nikolay Stoimenov, Pengcheng Huang, Lothar Thiele Computer Engineering and Networks Laboratory, ETH Zurich, 8092 Zu

Source URL: www.tik.ethz.ch

• Parallel computing
• Operations research
• Scheduling
• Concurrent programming languages
• Mixed criticality
• Multi-core processor
• Windows Task Scheduler
• XC
• Schedule

Cache Line Aware Optimizations for ccNUMA Systems Sabela Ramos Torsten Hoefler Computer Architecture Group

Source URL: htor.inf.ethz.ch

• Parallel computing
• Non-uniform memory access
• Nehalem
• Intel QuickPath Interconnect
• Xeon
• Cache coherence
• Multi-core processor
• Thread
• OpenMP
• Cache
• CPU cache
• Draft:Cache memory

Real-Time Systems manuscript No. (will be inserted by the editor) Mixed-Criticality Scheduling on Cluster-Based Manycores with Shared Communication and Storage Resources Georgia Giannopoulou · Nikolay Stoimenov ·

Source URL: www.tik.ethz.ch

• Computing
• Parallel computing
• Mixed criticality
• Multi-core processor
• Manycore processor
• Thread
• Massively parallel processor array
• Computer cluster
• Scheduling
• Cache memory

A Large-Scale Agent-Based Traffic Microsimulation Based On Queue Model Nurhan Cetin, Dept. of Computer Science Adrian Burri, Dept. of Computer Science Kai Nagel, Dept. of Computer Science

Source URL: www.strc.ch

• Parallel computing
• Operations research
• Scientific modeling
• Road traffic management
• Road transport
• Traffic simulation
• Distributed computing
• Queueing theory
• Multi-core processor
• Simulation
• Traffic congestion
• Supercomputer

04 ACP” Fanless Multi-Touch Computer With Intel® Core™ i7/i5/Celeron® E1020E Processor, 2 GB RAM Infotainment Multi-Touch Panel Solutions

Source URL: tritech.se